International Conference on Computer Architecture and Hardware - (ICCAH-27)


30th - 1st July, 2027 | Lisbon, Portugal

Multi-format (In-person/Virtual)

Registration Options

Explore conference registration categories designed for every mode of participation.

Important Dates

Pre-registration Deadline

31st May, 2027

Paper Submission Deadline

5th June, 2027

Last Date Of Registration

15th June, 2027

Date Of Conference

30th - 1st July, 2027

Downloads

Call for Papers

The (ICCAH-27) is dedicated to advancing research excellence by bringing together leading scholars, scientists, and professionals from across the globe. It provides a platform for the dissemination of high-quality research and innovative methodologies.

With a strong focus on Computer Software and Applications, Systems Engineering, Information Technology, Electrical and Electronics Engineering, Software Engineering, the conference promotes research that contributes to academic depth, practical insights, and interdisciplinary knowledge integration.

Authors are invited to submit papers addressing, but not limited to, the following areas:

  • Innovations in computer architecture design
  • Performance optimization techniques in hardware
  • Energy-efficient computing architectures
  • Emerging trends in microprocessor technology
  • Architectural support for machine learning
  • Hardware security and trustworthiness
  • Parallel processing architectures and applications
  • Reconfigurable computing systems and methodologies
  • Interconnect technologies for high-performance computing
  • Architectural challenges in quantum computing
  • Memory hierarchy design and optimization
  • Fault tolerance in computer architecture
  • Architectural implications of 5G technology
  • Low-power design techniques for hardware
  • Benchmarking methodologies for computer architecture
  • Architectural support for big data processing
  • Virtualization technologies in hardware design
  • Impact of AI on computer architecture
  • Design methodologies for embedded systems
  • Future directions in hardware architecture research

Peer Review Process

All submissions will be evaluated through a structured peer-review process to ensure academic rigor and contribution to the field. Accepted papers will be presented and may be considered for publication in high-quality journals and indexed conference proceedings.

Registration Details

Secure your participation by completing the registration process at the earliest. Limited presentation slots are allocated on a first-come, first-served basis.

Publication Opportunities

High-quality submissions will be prioritized for publication opportunities in recognized journals and indexed proceedings.